DISPLAY APPARATUS

A display apparatus can include an Nth scan driving stage among a plurality of scan driving stages, which outputs an Nth scan signal to an Nth pixel and an N+1th pixel among the plurality of pixels, in accordance with a scan start signal and a plurality of gate clock signals. Further, an Nth reset driving stage among the plurality of reset driving stages outputs an Nth reset signal to the Nth pixel in accordance with a reset start signal and the plurality of gate clock signals. The Nth scan driving stage and the Nth reset driving stage can be symmetrical with respect to a plurality of gate clock signals lines to which a plurality of gate clock signals is applied, and an anode electrode of the light emitting diode included in the Nth pixel can be initialized in accordance with the Nth reset signal.