DEVICE AND METHOD FOR UPDATING REGISTER TRANSFER LEVEL POWER MODEL

Provided are a device and method for updating a register transfer level (RTL) power model for power consumption analysis of a semiconductor circuit by at least one processor. The method includes receiving a test scenario including a plurality of time slots, inputting the test scenario to an initial power model and identifying a first set of time slots related to a power state which is not defined by the initial power model among the plurality of time slots, determining a power value for a specific power state related to a second set of time slots which is a subset of the first set of time slots, and updating the initial power model on the basis of the specific power state and the determined power value. Each of the plurality of time slots is related to one power state.