FLIP-CHIP ON LEADFRAME HAVING PARTIALLY ETCHED LANDING SITES

A flip-chip on leadframe package includes a leadframe having a plurality of leads with each lead including an inner leadfinger portion, wherein at least a landing region of all of the inner leadfinger portions are in a single common level (or plane) and include etched areas providing bump pads havin...

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Bibliographische Detailangaben
Hauptverfasser: MANAOIS, GLORIA BIBAL, BALIDOY, EDGAR DOROTAYO, ANCHETA, BERNARD KAEBIN ANDRES, ARGUELLES, RONALDO MARASIGAN
Format: Patent
Sprache:eng
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Zusammenfassung:A flip-chip on leadframe package includes a leadframe having a plurality of leads with each lead including an inner leadfinger portion, wherein at least a landing region of all of the inner leadfinger portions are in a single common level (or plane) and include etched areas providing bump pads having concave landing sites (landing sites). A semiconductor die (die) having an active top side surface with functional circuitry including bond pads has bumps or pillars thereon. An area of the landing sites is greater than an area of the bumps or pillars. A distal end of the bumps or pillars is within and electrically coupling to the landing sites. A mold material encapsulates the die and at least a portion of the inner leadfinger portions. The package can be a leaded package or a leadless package.