TRANSISTOR PACKAGES WITH IMPROVED DIE ATTACH

TRANSISTOR PACKAGES WITH IMPROVED DIE ATTACH

A transistor device structure may include a submount, a transistor device on the carrier submount, and a metal bonding layer between the submount and the transistor die, the metal bonding stack providing mechanical attachment of the transistor die to the submount. The metal bonding stack may include...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Pun, Arthur
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Pun, Arthur
description A transistor device structure may include a submount, a transistor device on the carrier submount, and a metal bonding layer between the submount and the transistor die, the metal bonding stack providing mechanical attachment of the transistor die to the submount. The metal bonding stack may include gold, tin and nickel. A weight percentage of a combination of nickel and tin in the metal bonding layer is greater than 50 percent and a weight percentage of gold in the metal bonding layer is less than 25 percent.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2022139852A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2022139852A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2022139852A13</originalsourceid><addsrcrecordid>eNrjZNAJCXL0C_YMDvEPUghwdPZ2dHcNVgj3DPFQ8PQNCPIPc3VRcPF0VXAMCXF09uBhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRkaGxpYWpkaOhsbEqQIAOIomLA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>TRANSISTOR PACKAGES WITH IMPROVED DIE ATTACH</title><source>esp@cenet</source><creator>Pun, Arthur</creator><creatorcontrib>Pun, Arthur</creatorcontrib><description>A transistor device structure may include a submount, a transistor device on the carrier submount, and a metal bonding layer between the submount and the transistor die, the metal bonding stack providing mechanical attachment of the transistor die to the submount. The metal bonding stack may include gold, tin and nickel. A weight percentage of a combination of nickel and tin in the metal bonding layer is greater than 50 percent and a weight percentage of gold in the metal bonding layer is less than 25 percent.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220505&amp;DB=EPODOC&amp;CC=US&amp;NR=2022139852A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220505&amp;DB=EPODOC&amp;CC=US&amp;NR=2022139852A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Pun, Arthur</creatorcontrib><title>TRANSISTOR PACKAGES WITH IMPROVED DIE ATTACH</title><description>A transistor device structure may include a submount, a transistor device on the carrier submount, and a metal bonding layer between the submount and the transistor die, the metal bonding stack providing mechanical attachment of the transistor die to the submount. The metal bonding stack may include gold, tin and nickel. A weight percentage of a combination of nickel and tin in the metal bonding layer is greater than 50 percent and a weight percentage of gold in the metal bonding layer is less than 25 percent.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAJCXL0C_YMDvEPUghwdPZ2dHcNVgj3DPFQ8PQNCPIPc3VRcPF0VXAMCXF09uBhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRkaGxpYWpkaOhsbEqQIAOIomLA</recordid><startdate>20220505</startdate><enddate>20220505</enddate><creator>Pun, Arthur</creator><scope>EVB</scope></search><sort><creationdate>20220505</creationdate><title>TRANSISTOR PACKAGES WITH IMPROVED DIE ATTACH</title><author>Pun, Arthur</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022139852A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Pun, Arthur</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Pun, Arthur</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>TRANSISTOR PACKAGES WITH IMPROVED DIE ATTACH</title><date>2022-05-05</date><risdate>2022</risdate><abstract>A transistor device structure may include a submount, a transistor device on the carrier submount, and a metal bonding layer between the submount and the transistor die, the metal bonding stack providing mechanical attachment of the transistor die to the submount. The metal bonding stack may include gold, tin and nickel. A weight percentage of a combination of nickel and tin in the metal bonding layer is greater than 50 percent and a weight percentage of gold in the metal bonding layer is less than 25 percent.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2022139852A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title TRANSISTOR PACKAGES WITH IMPROVED DIE ATTACH
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-11T18%3A44%3A57IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Pun,%20Arthur&rft.date=2022-05-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2022139852A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true