INTEGRATED CIRCUIT DIRECT COOLING SYSTEMS AND RELATED METHODS
Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the s...
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creator | PARK, Changyoung LEE, Yoonsoo LEE, Byoungok IM, Seungwon JEON, Oseob LEE, Dukyong SON, Joonseo |
description | Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2022093487A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2022093487A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2022093487A13</originalsourceid><addsrcrecordid>eNrjZLD19AtxdQ9yDHF1UXD2DHIO9QxRcPEMcnUOUXD29_fx9HNXCI4MDnH1DVZw9HNRCHL1ASv1dQ3x8HcJ5mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgZGRgaWxiYW5o6GxsSpAgDiCSri</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INTEGRATED CIRCUIT DIRECT COOLING SYSTEMS AND RELATED METHODS</title><source>esp@cenet</source><creator>PARK, Changyoung ; LEE, Yoonsoo ; LEE, Byoungok ; IM, Seungwon ; JEON, Oseob ; LEE, Dukyong ; SON, Joonseo</creator><creatorcontrib>PARK, Changyoung ; LEE, Yoonsoo ; LEE, Byoungok ; IM, Seungwon ; JEON, Oseob ; LEE, Dukyong ; SON, Joonseo</creatorcontrib><description>Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220324&DB=EPODOC&CC=US&NR=2022093487A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220324&DB=EPODOC&CC=US&NR=2022093487A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PARK, Changyoung</creatorcontrib><creatorcontrib>LEE, Yoonsoo</creatorcontrib><creatorcontrib>LEE, Byoungok</creatorcontrib><creatorcontrib>IM, Seungwon</creatorcontrib><creatorcontrib>JEON, Oseob</creatorcontrib><creatorcontrib>LEE, Dukyong</creatorcontrib><creatorcontrib>SON, Joonseo</creatorcontrib><title>INTEGRATED CIRCUIT DIRECT COOLING SYSTEMS AND RELATED METHODS</title><description>Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLD19AtxdQ9yDHF1UXD2DHIO9QxRcPEMcnUOUXD29_fx9HNXCI4MDnH1DVZw9HNRCHL1ASv1dQ3x8HcJ5mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgZGRgaWxiYW5o6GxsSpAgDiCSri</recordid><startdate>20220324</startdate><enddate>20220324</enddate><creator>PARK, Changyoung</creator><creator>LEE, Yoonsoo</creator><creator>LEE, Byoungok</creator><creator>IM, Seungwon</creator><creator>JEON, Oseob</creator><creator>LEE, Dukyong</creator><creator>SON, Joonseo</creator><scope>EVB</scope></search><sort><creationdate>20220324</creationdate><title>INTEGRATED CIRCUIT DIRECT COOLING SYSTEMS AND RELATED METHODS</title><author>PARK, Changyoung ; LEE, Yoonsoo ; LEE, Byoungok ; IM, Seungwon ; JEON, Oseob ; LEE, Dukyong ; SON, Joonseo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2022093487A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>PARK, Changyoung</creatorcontrib><creatorcontrib>LEE, Yoonsoo</creatorcontrib><creatorcontrib>LEE, Byoungok</creatorcontrib><creatorcontrib>IM, Seungwon</creatorcontrib><creatorcontrib>JEON, Oseob</creatorcontrib><creatorcontrib>LEE, Dukyong</creatorcontrib><creatorcontrib>SON, Joonseo</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PARK, Changyoung</au><au>LEE, Yoonsoo</au><au>LEE, Byoungok</au><au>IM, Seungwon</au><au>JEON, Oseob</au><au>LEE, Dukyong</au><au>SON, Joonseo</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INTEGRATED CIRCUIT DIRECT COOLING SYSTEMS AND RELATED METHODS</title><date>2022-03-24</date><risdate>2022</risdate><abstract>Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | INTEGRATED CIRCUIT DIRECT COOLING SYSTEMS AND RELATED METHODS |
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