MEMORY DEVICE FOR ADJUSTING DELAY ON DATA CLOCK PATH, MEMORY SYSTEM INCLUDING THE MEMORY DEVICE, AND OPERATING METHOD OF THE MEMORY SYSTEM

A memory system includes a memory device configured to monitor a first oscillator count value for a write data strobe signal for sampling a data signal at a first temperature and a second oscillator count value for the write data strobe signal for sampling the data signal at a second temperature, and a memory controller configured to determine a weight based on the first oscillator count value and the second oscillator count value, wherein the memory device is configured to sample the data signal by adjusting a delay on a transfer path of the write data strobe signal according to a change in temperature of the memory device based on the weight.