INDICATING A PROBING TARGET FOR A FABRICATED ELECTRONIC CIRCUIT

A method for indicating a probing target for a fabricated electronic circuit including: generating an electronic, three-dimensional model based on manufacturing layout information of a fabricated circuit; obtaining, with a vision system, visual environment information for the fabricated circuit; sca...

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Bibliographische Detailangaben
1. Verfasser:	Burgess, David Everett
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
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Beschreibung
Zusammenfassung:	A method for indicating a probing target for a fabricated electronic circuit including: generating an electronic, three-dimensional model based on manufacturing layout information of a fabricated circuit; obtaining, with a vision system, visual environment information for the fabricated circuit; scaling and orienting the three-dimensional model by a scaler and mapper based on the visual environment information; overlaying the three-dimensional model with the visual environment information to produce a correlated image; obtaining an identification of a desired network node of the fabricated circuit; and indicating a probing target, the probing target corresponding to the desired network node of the fabricated circuit.