SEMICONDUCTOR INTEGRATED CIRCUIT
A semiconductor integrated circuit includes multiple termination circuits that correspond to multiple target pins. The multiple termination circuits each include a first resistor and a first transistor coupled in series between the corresponding target pin and the ground. A second resistor is provid...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A semiconductor integrated circuit includes multiple termination circuits that correspond to multiple target pins. The multiple termination circuits each include a first resistor and a first transistor coupled in series between the corresponding target pin and the ground. A second resistor is provided between the corresponding target pin and the control electrode of the first transistor. The enable circuit is arranged such that its output node is coupled to the control electrode of the first transistor, and configured such that (i) when the enable pin is set to the first state, the current is sunk from the output node, and (ii) when the enable pin is set to the second state, the output node is set to the low level. |
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