PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES

PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES

Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a secon...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Boon, Suan Jeung, Chia, Yong Poo, Eng, Meow Koon
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.