MEMORY DEVICE INCLUDING TEST CONTROL CIRCUIT

A memory device includes a memory cell array suitable for storing data, an input/output circuit suitable for inputting and outputting the data stored in the memory cell array, a test register circuit suitable for testing the input/output circuit, and a test control block comprising a replica circuit...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CHO, Hosung, JU, Yucheon
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A memory device includes a memory cell array suitable for storing data, an input/output circuit suitable for inputting and outputting the data stored in the memory cell array, a test register circuit suitable for testing the input/output circuit, and a test control block comprising a replica circuit configured by modeling the test register circuit, and suitable for generating data to test the test register circuit.