MEMORY DEVICE INCLUDING TEST CONTROL CIRCUIT
A memory device includes a memory cell array suitable for storing data, an input/output circuit suitable for inputting and outputting the data stored in the memory cell array, a test register circuit suitable for testing the input/output circuit, and a test control block comprising a replica circuit...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A memory device includes a memory cell array suitable for storing data, an input/output circuit suitable for inputting and outputting the data stored in the memory cell array, a test register circuit suitable for testing the input/output circuit, and a test control block comprising a replica circuit configured by modeling the test register circuit, and suitable for generating data to test the test register circuit. |
---|