MEMORY DEVICE HAVING IMPROVED PROGRAM AND ERASE OPERATIONS AND OPERATING METHOD OF THE MEMORY DEVICE

A method for operating a memory device includes providing a memory block including at least one source select transistor coupled between a source line and a bit line, a plurality of memory cells, and a drain select transistor, controlling a source select line coupled to the at least one source selec...

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Bibliographische Detailangaben
Hauptverfasser: LEE, Byung In, TAK, Jae Il, PARK, Hee Joung, LEE, Sang Heon, SHIM, Keon Soo
Format: Patent
Sprache:eng
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Zusammenfassung:A method for operating a memory device includes providing a memory block including at least one source select transistor coupled between a source line and a bit line, a plurality of memory cells, and a drain select transistor, controlling a source select line coupled to the at least one source select transistor and a plurality of word lines coupled to the plurality of memory cells to be in a floating state, and applying an erase voltage to the source line and the bit line.