ASYNCHRONOUS PROCESSOR ARCHITECTURE

A data processing method comprising: a control unit, at least one ALU, a set of registers, a memory and a memory interface. The method comprises: a) obtaining the memory addresses of the operands; b) reading the operands from memory; c) transmitting an instruction to execute computing operations to the ALU without any addressing instruction; d) executing all of the elementary operations by way of the ALU receiving, at input, each of the operands from the registers; e) storing the data forming results of the processing operation on the registers; f) obtaining a memory address for each of the data forming a result of the processing operation; g) writing the results to memory for storage and via the memory interface, by way of the obtained memory addresses.