OVERLAY OPTIMIZATION

The present disclosure generally relates to semiconductor structures and, more particularly, to overlay optimization and methods of manufacture. The method includes performing, by a computing device, an exposure with a correction parameter to a first wafer; performing, by the computing device, a dec...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KRUMANOCKER, Ian R, GOOD, Richard P
Format: Patent
Sprache:eng
Schlagworte:
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