CLOCK DATA RECOVERY CIRCUIT

CLOCK DATA RECOVERY CIRCUIT

A clock data recovery circuit includes a deglitch filter circuit and a timer circuit. The deglitch filter circuit is configured to remove pulses of less than a predetermined duration from a data signal to produce a deglitched data signal. The timer circuit is coupled to the deglitch filter, and is c...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Pandey, Pankaj, Hanschke, Michael Ryan, Evans, David Wayne, Pham, Joseph
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A clock data recovery circuit includes a deglitch filter circuit and a timer circuit. The deglitch filter circuit is configured to remove pulses of less than a predetermined duration from a data signal to produce a deglitched data signal. The timer circuit is coupled to the deglitch filter, and is configured to compare a duration of a pulse of the deglitched data signal to a threshold duration, and identify the pulse as representing a logic one based on the duration of the pulse exceeding the threshold duration.