NONVOLATILE MEMORY DEVICES AND METHODS OF READING THE NONVOLATILE MEMORY DEVICES

A nonvolatile memory device includes a nonvolatile memory cell including a first cell transistor and a second cell transistor electrically coupled to a bit line in parallel and configured to respectively have a first physical size and a second physical size, a cell transistor selector coupled between the nonvolatile memory cell and a ground voltage terminal to control electrical connections between the first cell transistor and the ground voltage terminal, and between the second cell transistor and the ground voltage terminal, and a read voltage selection circuit suitable for selectively supplying one of a first read voltage and a second read voltage to the bit line.