VIA CONTACT PATTERNING METHOD TO INCREASE EDGE PLACEMENT ERROR MARGIN

An example via contact patterning method includes providing a pattern of alternating trench contacts and gates over a support structure. For each pair of adjacent trench contacts and gates, a trench contact is electrically insulated from an adjacent gate by a dielectric material and/or multiple laye...

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Bibliographische Detailangaben
Hauptverfasser: Bang, Kilhyun, Bahr, Daniel James, An, Seungdo, Haran, Mohit K, Basu, Debashish, Jeong, James, Brain, Ruth Amy, Rao, Deepak S, Klaus, Jason W, Patel, Reken, Wallace, Charles Henry, Paik, Marvin Young
Format: Patent
Sprache:eng
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Zusammenfassung:An example via contact patterning method includes providing a pattern of alternating trench contacts and gates over a support structure. For each pair of adjacent trench contacts and gates, a trench contact is electrically insulated from an adjacent gate by a dielectric material and/or multiple layers of different dielectric materials, and the gates are recessed with respect to the trench contacts. The method further includes wrapping a protective layer of one or more dielectric materials, and a sacrificial helmet material on top of the trench contacts to protect them during the via contact patterning and etch processes for forming via contacts over one or more gates. Such a method may advantageously allow increasing the edge placement error margin for forming via contacts of metallization stacks.