DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARATUS USING THE DELAY LINE AND THE DELAY LOCKED LOOP CIRCUIT

DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARATUS USING THE DELAY LINE AND THE DELAY LOCKED LOOP CIRCUIT

A delay line includes a first delay cell and a second delay cell. The first delay cell inverts an input signal to generate a first output signal. The second delay cell inverts the first output signal to generate a second output signal. The driving forces of the first delay cell is adjusted on the ba...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HAN, Yun Tack, KIM, Kyeong Min
Format: Patent
Sprache:eng
Schlagworte:
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
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Beschreibung
Zusammenfassung:A delay line includes a first delay cell and a second delay cell. The first delay cell inverts an input signal to generate a first output signal. The second delay cell inverts the first output signal to generate a second output signal. The driving forces of the first delay cell is adjusted on the basis of a delay control voltage and the second output signal.