MEMORY CHIP, MEMORY MODULE AND METHOD FOR PSEUDO-ACCESSING MEMORY BANK THEREOF

The present application proposes a memory chip includes a plurality of memory banks, a plurality of address pins, and a pseudo-address determining circuit. The plurality of address pins is arranged for receiving a plurality of address signals corresponding to the plurality of memory banks, respectively. The pseudo-address determining circuit has a plurality of input terminals coupled to the plurality of address pins, respectively, and a plurality of output terminals coupled to the plurality of memory banks. The pseudo-address determining circuit generates a pseudo-address table for the plurality of memory banks when the memory chip is powered-up. The pseudo-address table has a plurality of pseudo-addresses corresponding to the plurality of memory banks, respectively. The present application also provides a memory module that incorporates the memory chip and a method for pseudo-accessing memory banks of the memory chip.