BATTERY LIFE BASED ON INHIBITED MEMORY REFRESHES

Disclosed herein are mechanisms and methods for reducing power consumed by various DRAM technologies (e.g., high-capacity DRAM and/or 3D DRAM) which may impact battery life of the platform. These mechanisms and methods may opportunistically reduce the power consumed by DRAM by inhibiting periodic re...

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Bibliographische Detailangaben
Hauptverfasser: Jayaraman, Ramkumar, Ghosh, Kausik, H, Krishnaprasad
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Disclosed herein are mechanisms and methods for reducing power consumed by various DRAM technologies (e.g., high-capacity DRAM and/or 3D DRAM) which may impact battery life of the platform. These mechanisms and methods may opportunistically reduce the power consumed by DRAM by inhibiting periodic refresh commands to memory ranks that are not in-use. Since these mechanisms and methods may be based on enhancements to memory controllers, they may accordingly be operating system (OS) agnostic.