PARALLELIZED ROUNDING FOR DECIMAL FLOATING POINT TO BINARY CODED DECIMAL CONVERSION

A computer-implemented method includes: receiving, using a processor, a decimal floating point number; and using a floating point unit within the processor to convert the decimal floating point number into a binary coded decimal number, wherein the floating point unit starts a conversion loop subseq...

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Bibliographische Detailangaben
Hauptverfasser:	Hofmann, Nicol, Figuli, Razvan Peter, Payer, Stefan, Mueller, Silvia Melitta
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	A computer-implemented method includes: receiving, using a processor, a decimal floating point number; and using a floating point unit within the processor to convert the decimal floating point number into a binary coded decimal number, wherein the floating point unit starts a conversion loop subsequent to a rounding loop starting, wherein the rounding loop and the conversion loop run in parallel once started.