METHOD OF FAST ERASING AN EEPROM WITH LOW-VOLTAGES, WHERE IONS ARE IMPLANTED AT A HIGHER CONCENTRATION TO INCREASE THE INTENSITY OF THE ELECTRIC FIELD BETWEEN THE GATE AND THE SUBSTRATE OR BETWEEN THE GATE AND THE TRANSISTOR AND THUS DECREASE THE REQUIRED VOLTAGE DIFFERENCE FOR ERASING THE EEPROM

The present invention discloses a method of fast erasing an EEPROM with low-voltages. The EEPROM includes a transistor structure is formed in a semiconductor substrate and the transistor structure includes a first electric-conduction gate. Same type ions are implanted into a region of the semiconduc...

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Bibliographische Detailangaben

Hauptverfasser:	CHUNG, CHENG-YU, HUANG, WENIEN, LIN, HSINANG
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES
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