METHODS AND APPARATUS FOR THREE-DIMENSIONAL NAND STRUCTURE FABRICATION

Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. The method includes depositing in a stack of alternating insulator layers and memory cell layers a layer of silicon oxide, a layer of silicon nitride, and a layer of amorphous silicon; removing the layer o...

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Bibliographische Detailangaben
1. Verfasser: PURAYATH, VINOD ROBERT
Format: Patent
Sprache:eng
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Zusammenfassung:Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. The method includes depositing in a stack of alternating insulator layers and memory cell layers a layer of silicon oxide, a layer of silicon nitride, and a layer of amorphous silicon; removing the layer of amorphous silicon while maintaining the layer of amorphous silicon in a recess of the memory cells; selectively oxidizing the layer of amorphous silicon and the layer of silicon nitride to remove the layer of amorphous silicon from the recess and the layer of silicon nitride from the insulator layers; and removing oxidizing material from the recess and the insulator layers such that the layer of silicon nitride remains only in the recess of each memory cell of the memory cell layers and the layer of silicon oxide remains on both the insulator layers and the memory cell layers.