BURIED CONDUCTIVE LAYER SUPPLYING DIGITAL CIRCUITS

An embodiment may include a method of forming an integrated circuit. The method may include forming a first pair of transistors stacked vertically above a semiconductor substrate arranged substantially perpendicular to the plurality of layers. Each of the first pair of vertically stacked transistors...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: PILLE, Juergen, SAUTTER, Rolf, WERNER, Tobias, FRISCH, Albert, WENDEL, Dieter
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An embodiment may include a method of forming an integrated circuit. The method may include forming a first pair of transistors stacked vertically above a semiconductor substrate arranged substantially perpendicular to the plurality of layers. Each of the first pair of vertically stacked transistors are of the same type and are connected in series. The method may include forming a second pair of transistors connected in parallel and arranged substantially perpendicular to the plurality of layers. The second pair of transistors are a different type than the first pair of vertically stacked transistors. The method may include forming a power supply rail within the semiconductor substrate and arranged at one end of the first pair of vertically stacked transistors.