APPARATUS AND METHOD TO PREVENT INTEGRATED CIRCUIT FROM ENTERING LATCH-UP MODE

The disclosure provides an apparatus for preventing an integrated circuit (IC) structure from entering a latch-up mode. In an embodiment, the apparatus may include: a p-type substrate; an n-well within the p-type substrate; an n-type region within the p-type substrate, the n-type region being distin...

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Bibliographische Detailangaben
Hauptverfasser: Chang, Shunhua T, Yu, Mickey H, Muhammad, Mujahid, Lu, Xiangxiang, Gebreselasie, Ephrem G
Format: Patent
Sprache:eng
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Zusammenfassung:The disclosure provides an apparatus for preventing an integrated circuit (IC) structure from entering a latch-up mode. In an embodiment, the apparatus may include: a p-type substrate; an n-well within the p-type substrate; an n-type region within the p-type substrate, the n-type region being distinct from the n-well; a p-type region within the n-well; a power supply electrically coupled to the p-type region within the n-well; and a directional diode electrically coupling the power supply to the n-well in parallel with the p-type region. The directional diode biases a current flow from the power supply to the n-well, and the directional diode contacts the n-well distal to the p-type region.