DUTY CYCLE CORRECTION SYSTEM AND LOW DROPOUT (LDO) REGULATOR BASED DELAY-LOCKED LOOP (DLL)

An apparatus is provided, where the apparatus includes a plurality of components; a first circuitry to generate a clock signal, and to supply the clock signal to the plurality of components; a second circuitry to estimate, for each of two or more components of the plurality of components, a correspo...

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Bibliographische Detailangaben
Hauptverfasser:	Mansuri, Mozhgan, Balamurugan, Ganesh, O'Mahony, Frank, Dour, Navneet, Tirumalai, Sridhar, Thomas, Alex, Casper, Bryan, Cheng, Roger, Martin, Aaron, Venkatramani, Hari, Nguyen, Quoc, Balankutty, Ajay, Zhou, Kuan, Venkataramana, Krishnamurthy
Format:	Patent
Sprache:	eng
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY INFORMATION STORAGE PHYSICS PULSE TECHNIQUE STATIC STORES
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Beschreibung
Zusammenfassung:	An apparatus is provided, where the apparatus includes a plurality of components; a first circuitry to generate a clock signal, and to supply the clock signal to the plurality of components; a second circuitry to estimate, for each of two or more components of the plurality of components, a corresponding duty cycle of the clock signal received at the corresponding component, wherein two or more duty cycles corresponding to the two or more components are determined; a third circuitry to determine an average of the two or more duty cycles; and a fourth circuitry to correct a duty cycle of the clock signal generated by the first circuitry, based at least in part on the average.