BYPASS PATH LOSS REDUCTION

Aspects of this disclosure relate to reducing insertion loss associated with a bypass path. In an embodiment, an apparatus includes a first switch having at least two throws, a second switch having at least two throws, a bypass path between the first switch and the second switch, and at least one in...

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Bibliographische Detailangaben
Hauptverfasser: Lee, Junhyung, Agarwal, Bipul, Lee, Yong Hee, Heo, Junwon
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Aspects of this disclosure relate to reducing insertion loss associated with a bypass path. In an embodiment, an apparatus includes a first switch having at least two throws, a second switch having at least two throws, a bypass path between the first switch and the second switch, and at least one inductor. The at least one inductor is configured to compensate for capacitance associated with the bypass path to cause insertion loss of the bypass path to be reduced.