Semiconductor Device
A normally-off first gate channel region is provided on a first main surface side, in a region in a p base between an n base and an n emitter connected to an emitter electrode. On and off of the first gate channel region is controlled by a voltage of a first gate electrode. A normally-on second gate...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A normally-off first gate channel region is provided on a first main surface side, in a region in a p base between an n base and an n emitter connected to an emitter electrode. On and off of the first gate channel region is controlled by a voltage of a first gate electrode. A normally-on second gate channel region is provided on a second main surface side, by an n-type region between an n collector electrically connected to a collector electrode and the n base. On and off of the second gate channel region is controlled by a voltage of a second gate electrode. |
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