TIMER MANAGEMENT FOR NETWORK DEVICES

Timer management techniques are described. An example processing device includes a memory configured to store successive wheels available to be included in traversal paths for timers running on the device, each wheel representing a queue of timers, each wheel having a different, corresponding time delay (TO) value for queuing a timer, and processing circuitry in communication with the memory. The processing circuitry is configured to determine, in response to a request for a timer, a total traversal time for the timer, to select, from the stored wheels, a subset of wheels such that a sum of the respective TO values of the selected subset is within a predetermined margin of error with respect to the total traversal time for the timer, and to sequence the selected subset of wheels based on the respective TO values of the selected subset of wheels to form a traversal path for the timer.