Virtual Processor Cache Reuse

An approach is provided in which a first core broadcasts a cache line request in response to detecting a cache miss corresponding to a first virtual central processing unit (VCPU) executing on the first core. Next, the first core receives a cache line response from the second core responding to the...

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Bibliographische Detailangaben
Hauptverfasser: Mohan, Gayathri, Raghavan, Ram, Pesantez, Maria Lorena, Olszewski, Bret R
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:An approach is provided in which a first core broadcasts a cache line request in response to detecting a cache miss corresponding to a first virtual central processing unit (VCPU) executing on the first core. Next, the first core receives a cache line response from the second core responding to the cache line request that includes tag extension data. The first core determines a cache miss type of the cache miss based on the tag extension data and, in turn, sends the cache miss type to a hypervisor that utilizes the cache miss type during a future VCPU dispatch selection.