CLIENT LATENCY-AWARE MICRO-IDLE MEMORY POWER MANAGEMENT

Systems and methods are disclosed for providing micro-idle memory power management. One embodiment of a method comprises receiving and storing an exit latency vote from each of a plurality of memory subsystems on a system on chip electrically coupled to a system memory. In response to a micro-idle m...

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Bibliographische Detailangaben
Hauptverfasser: SINGH, MAHESHWAR THAKUR, CHHABRA, PAWAN, TIWARI, HARSHIT, GUPTA, MAYANK, DEVARASETTY, VENKATA
Format: Patent
Sprache:eng
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