OPERATIONAL SIGNALS GENERATED FROM CAPACITIVE STORED CHARGE

Methods, a memory device, and a system are disclosed. One such method includes providing a first pulse to one of multiple bit lines of a variable resistance memory structure at a first time using a first transistor, a second pulse to the one of the multiple bit lines at a second time later than the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Hirst, Jeremy M, Castro, Hernan A, Carman, Eric S
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:Methods, a memory device, and a system are disclosed. One such method includes providing a first pulse to one of multiple bit lines of a variable resistance memory structure at a first time using a first transistor, a second pulse to the one of the multiple bit lines at a second time later than the first time using the first transistor, and a third pulse to the one of the multiple bit lines at a third time later than the second time using a second transistor.