HARDWARE ACCELERATED NEURAL NETWORK SUBGRAPHS

HARDWARE ACCELERATED NEURAL NETWORK SUBGRAPHS

Technology related to hardware accelerated neural network subgraphs is disclosed. In one example of the disclosed technology, a method includes receiving source code specifying a neural network model. The source code includes an application programming interface (API) marking a subgraph of the neura...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Lo, Daniel, El Husseini, Ahmad Mahdi, Reinhardt, Steven K, Forin, Alessandro, Seera, Sarabjit Singh, Kovvuri, Ratna Kumar, van Megen, Friedel, Chung, Eric S
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
PHYSICS
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Beschreibung
Zusammenfassung:Technology related to hardware accelerated neural network subgraphs is disclosed. In one example of the disclosed technology, a method includes receiving source code specifying a neural network model. The source code includes an application programming interface (API) marking a subgraph of the neural network model as targeted for hardware acceleration. The method includes compiling the subgraph to the neural network accelerator target to generate configuration information for the hardware accelerator. The method includes configuring the hardware accelerator to evaluate the neural network model, where the hardware accelerator is configured using the configuration information.