Enhanced Automatic identification System

The invention relates to method and apparatus for improving the performance of communication systems using Run length Limited (RLL) messages such as the existing Automatic Identification System (AIS). A binary data sequence is Forward Error Correction (FEC) coded and then the sequence is compensated...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: McKilliam, Robert George, Pollok, Andre, Lavenant, Marc Pierre Denis, Lechner, Gottfried, Haley, David Victor Lawrie, Land, Ingmar Rudiger, Grant, Alexander James
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The invention relates to method and apparatus for improving the performance of communication systems using Run length Limited (RLL) messages such as the existing Automatic Identification System (AIS). A binary data sequence is Forward Error Correction (FEC) coded and then the sequence is compensated, for example by bit-erasure, so that either bit-stuffing is not required, or a bit stuffer will not be activated to ensure that the coded sequence meets the RLL requirement. Various embodiments are described to handle different architectures or input points for the FEC encoder and bit erasure module. The bit erasure module may also add dummy bits to ensure a RLL compliant CRC or to selectively add bits to a reserve buffer to compensate for later bit stuffing in a header. Additional RLL training sequences may also be added to assist in, receiver acquisition.