OPTIMIZING HEADLESS VIRTUAL MACHINE MEMORY MANAGEMENT WITH GLOBAL TRANSLATION LOOKASIDE BUFFER SHOOTDOWN

Systems, methods, and computer programs are disclosed for optimizing headless virtual memory management in a system on chip (SoC) with global translation lookaside buffer shootdown. The SoC comprises an application processor configured to execute a headful virtual machine and one or more SoC process...

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Bibliographische Detailangaben
Hauptverfasser: Asbe, Samar, ZENG, THOMAS, Openshaw, Adam
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Systems, methods, and computer programs are disclosed for optimizing headless virtual memory management in a system on chip (SoC) with global translation lookaside buffer shootdown. The SoC comprises an application processor configured to execute a headful virtual machine and one or more SoC processing devices configured to execute a corresponding headless virtual machine. The method comprises issuing a virtual machine mapping command with a headless virtual machine having a first virtual machine identifier. In response to the virtual machine mapping command, a current value stored in a hardware register in the application processor is saved. The first virtual machine identifier associated with the headless virtual machine is loaded into the hardware register. A translation lookaside buffer (TLB) invalidate command is issued while the first virtual machine identifier is loaded in the hardware register. Upon completion of translation lookaside buffer synchronization, the current value is restored to the hardware register.