SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each o...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Lee, Chih-Cheng, Su, Yuan-Chang, Yen, You-Lung, Lee, Chun-Che, Chen, Tien-Szu, Lee, Ming-Chiang
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Lee, Chih-Cheng
Su, Yuan-Chang
Yen, You-Lung
Lee, Chun-Che
Chen, Tien-Szu
Lee, Ming-Chiang
description A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2019148280A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2019148280A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2019148280A13</originalsourceid><addsrcrecordid>eNrjZLANdvX1dPb3cwl1DvEPUggOdQoOCXIMcVVw9HNR8HUN8fB3UXADSvg6-oW6OTqHhAZ5-rkrhHi4KgQ7-rryMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL40GAjA0NLQxMLIwsDR0Nj4lQBAPDiKvA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME</title><source>esp@cenet</source><creator>Lee, Chih-Cheng ; Su, Yuan-Chang ; Yen, You-Lung ; Lee, Chun-Che ; Chen, Tien-Szu ; Lee, Ming-Chiang</creator><creatorcontrib>Lee, Chih-Cheng ; Su, Yuan-Chang ; Yen, You-Lung ; Lee, Chun-Che ; Chen, Tien-Szu ; Lee, Ming-Chiang</creatorcontrib><description>A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190516&amp;DB=EPODOC&amp;CC=US&amp;NR=2019148280A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190516&amp;DB=EPODOC&amp;CC=US&amp;NR=2019148280A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Lee, Chih-Cheng</creatorcontrib><creatorcontrib>Su, Yuan-Chang</creatorcontrib><creatorcontrib>Yen, You-Lung</creatorcontrib><creatorcontrib>Lee, Chun-Che</creatorcontrib><creatorcontrib>Chen, Tien-Szu</creatorcontrib><creatorcontrib>Lee, Ming-Chiang</creatorcontrib><title>SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME</title><description>A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLANdvX1dPb3cwl1DvEPUggOdQoOCXIMcVVw9HNR8HUN8fB3UXADSvg6-oW6OTqHhAZ5-rkrhHi4KgQ7-rryMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL40GAjA0NLQxMLIwsDR0Nj4lQBAPDiKvA</recordid><startdate>20190516</startdate><enddate>20190516</enddate><creator>Lee, Chih-Cheng</creator><creator>Su, Yuan-Chang</creator><creator>Yen, You-Lung</creator><creator>Lee, Chun-Che</creator><creator>Chen, Tien-Szu</creator><creator>Lee, Ming-Chiang</creator><scope>EVB</scope></search><sort><creationdate>20190516</creationdate><title>SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME</title><author>Lee, Chih-Cheng ; Su, Yuan-Chang ; Yen, You-Lung ; Lee, Chun-Che ; Chen, Tien-Szu ; Lee, Ming-Chiang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2019148280A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Lee, Chih-Cheng</creatorcontrib><creatorcontrib>Su, Yuan-Chang</creatorcontrib><creatorcontrib>Yen, You-Lung</creatorcontrib><creatorcontrib>Lee, Chun-Che</creatorcontrib><creatorcontrib>Chen, Tien-Szu</creatorcontrib><creatorcontrib>Lee, Ming-Chiang</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lee, Chih-Cheng</au><au>Su, Yuan-Chang</au><au>Yen, You-Lung</au><au>Lee, Chun-Che</au><au>Chen, Tien-Szu</au><au>Lee, Ming-Chiang</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME</title><date>2019-05-16</date><risdate>2019</risdate><abstract>A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2019148280A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T05%3A10%3A22IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Lee,%20Chih-Cheng&rft.date=2019-05-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2019148280A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true