FAILURE DETECTION FOR WIRE BONDING IN SEMICONDUCTORS

Disclosed is a system and method for collecting trace data of integrated circuits from the back-end assembly tools and using yield, reliability, and burn-in data to distinguish good circuit traces from bad ones. Described further is an system and method for implementing a heuristic mapping of trace...

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Bibliographische Detailangaben
Hauptverfasser:	Burch, Richard, Akiya, Nobuchika, Stine, Brian
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
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Beschreibung
Zusammenfassung:	Disclosed is a system and method for collecting trace data of integrated circuits from the back-end assembly tools and using yield, reliability, and burn-in data to distinguish good circuit traces from bad ones. Described further is an system and method for implementing a heuristic mapping of trace data for distinguishing between good or bad traces in an Internet-based or offline application. The result of this detection can then be used for yield improvement or for burn-in reduction where for example burn-in chips having "good" circuit traces are subjected to thermal stress for less time than for chips identified as having "bad" circuit traces.