CLOCK SYNCHRONIZATION IN MULTI-DIE FIELD PROGRAMMABLE GATE ARRAY DEVICES

CLOCK SYNCHRONIZATION IN MULTI-DIE FIELD PROGRAMMABLE GATE ARRAY DEVICES

The disclosure relates to systems and methods for sector-to-sector and die-to-die clock synchronization in programmable logic devices. The methods and systems may employ phase difference detector and programmable delay elements to minimize skews in the clock tree and facilitate timing closure of tim...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Oh, Keong Hong, Lim, Chooi Pei, Ooi, Boon Haw, Lim, Teik Wah
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:The disclosure relates to systems and methods for sector-to-sector and die-to-die clock synchronization in programmable logic devices. The methods and systems may employ phase difference detector and programmable delay elements to minimize skews in the clock tree and facilitate timing closure of time-critical paths and increase in operating frequencies.