CHIP CONTAINING AN ONBOARD NON-VOLATILE MEMORY COMPRISING A PHASE-CHANGE MATERIAL
An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located...
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| creator | BRUN, Philippe ODDOU, Jean-Pierre BROUSSOUS, Lucile ZOLL, Stephane HINSINGER, Olivier WEBER, Olivier BOIVIN, Philippe GALPIN, David FAVENNEC, Laurent ARNAUD, Franck MORIN, Pierre |
| description | An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2019140176A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2019140176A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2019140176A13</originalsourceid><addsrcrecordid>eNqNyjEKwjAUANAsDqLeIeAcaFQUx2-MTSD5P02i4FSKxEm0UO-PRTyA01velDXK2MAVYQaLFmsOyAkPBPHIkVBcyEG2TnOvPcXrOH2INn0nDwaSFsoA1mOArKMFN2eTe_cYyuLnjC1POisjSv9qy9B3t_Is7_acVpXcy00ld1uQ6__WB0UnMAw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>CHIP CONTAINING AN ONBOARD NON-VOLATILE MEMORY COMPRISING A PHASE-CHANGE MATERIAL</title><source>esp@cenet</source><creator>BRUN, Philippe ; ODDOU, Jean-Pierre ; BROUSSOUS, Lucile ; ZOLL, Stephane ; HINSINGER, Olivier ; WEBER, Olivier ; BOIVIN, Philippe ; GALPIN, David ; FAVENNEC, Laurent ; ARNAUD, Franck ; MORIN, Pierre</creator><creatorcontrib>BRUN, Philippe ; ODDOU, Jean-Pierre ; BROUSSOUS, Lucile ; ZOLL, Stephane ; HINSINGER, Olivier ; WEBER, Olivier ; BOIVIN, Philippe ; GALPIN, David ; FAVENNEC, Laurent ; ARNAUD, Franck ; MORIN, Pierre</creatorcontrib><description>An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190509&DB=EPODOC&CC=US&NR=2019140176A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190509&DB=EPODOC&CC=US&NR=2019140176A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BRUN, Philippe</creatorcontrib><creatorcontrib>ODDOU, Jean-Pierre</creatorcontrib><creatorcontrib>BROUSSOUS, Lucile</creatorcontrib><creatorcontrib>ZOLL, Stephane</creatorcontrib><creatorcontrib>HINSINGER, Olivier</creatorcontrib><creatorcontrib>WEBER, Olivier</creatorcontrib><creatorcontrib>BOIVIN, Philippe</creatorcontrib><creatorcontrib>GALPIN, David</creatorcontrib><creatorcontrib>FAVENNEC, Laurent</creatorcontrib><creatorcontrib>ARNAUD, Franck</creatorcontrib><creatorcontrib>MORIN, Pierre</creatorcontrib><title>CHIP CONTAINING AN ONBOARD NON-VOLATILE MEMORY COMPRISING A PHASE-CHANGE MATERIAL</title><description>An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjEKwjAUANAsDqLeIeAcaFQUx2-MTSD5P02i4FSKxEm0UO-PRTyA01velDXK2MAVYQaLFmsOyAkPBPHIkVBcyEG2TnOvPcXrOH2INn0nDwaSFsoA1mOArKMFN2eTe_cYyuLnjC1POisjSv9qy9B3t_Is7_acVpXcy00ld1uQ6__WB0UnMAw</recordid><startdate>20190509</startdate><enddate>20190509</enddate><creator>BRUN, Philippe</creator><creator>ODDOU, Jean-Pierre</creator><creator>BROUSSOUS, Lucile</creator><creator>ZOLL, Stephane</creator><creator>HINSINGER, Olivier</creator><creator>WEBER, Olivier</creator><creator>BOIVIN, Philippe</creator><creator>GALPIN, David</creator><creator>FAVENNEC, Laurent</creator><creator>ARNAUD, Franck</creator><creator>MORIN, Pierre</creator><scope>EVB</scope></search><sort><creationdate>20190509</creationdate><title>CHIP CONTAINING AN ONBOARD NON-VOLATILE MEMORY COMPRISING A PHASE-CHANGE MATERIAL</title><author>BRUN, Philippe ; ODDOU, Jean-Pierre ; BROUSSOUS, Lucile ; ZOLL, Stephane ; HINSINGER, Olivier ; WEBER, Olivier ; BOIVIN, Philippe ; GALPIN, David ; FAVENNEC, Laurent ; ARNAUD, Franck ; MORIN, Pierre</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2019140176A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>BRUN, Philippe</creatorcontrib><creatorcontrib>ODDOU, Jean-Pierre</creatorcontrib><creatorcontrib>BROUSSOUS, Lucile</creatorcontrib><creatorcontrib>ZOLL, Stephane</creatorcontrib><creatorcontrib>HINSINGER, Olivier</creatorcontrib><creatorcontrib>WEBER, Olivier</creatorcontrib><creatorcontrib>BOIVIN, Philippe</creatorcontrib><creatorcontrib>GALPIN, David</creatorcontrib><creatorcontrib>FAVENNEC, Laurent</creatorcontrib><creatorcontrib>ARNAUD, Franck</creatorcontrib><creatorcontrib>MORIN, Pierre</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BRUN, Philippe</au><au>ODDOU, Jean-Pierre</au><au>BROUSSOUS, Lucile</au><au>ZOLL, Stephane</au><au>HINSINGER, Olivier</au><au>WEBER, Olivier</au><au>BOIVIN, Philippe</au><au>GALPIN, David</au><au>FAVENNEC, Laurent</au><au>ARNAUD, Franck</au><au>MORIN, Pierre</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CHIP CONTAINING AN ONBOARD NON-VOLATILE MEMORY COMPRISING A PHASE-CHANGE MATERIAL</title><date>2019-05-09</date><risdate>2019</risdate><abstract>An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | CHIP CONTAINING AN ONBOARD NON-VOLATILE MEMORY COMPRISING A PHASE-CHANGE MATERIAL |
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