MOS-Gated Power Devices, Methods, and Integrated Circuits

MOS-gated devices, related methods, and systems for vertical power and RF devices including an insulated trench and a gate electrode. A body region is positioned so that a voltage bias on the gate electrode will cause an inversion layer in the body region. Permanent electrostatic charges are include...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Darwish, Mohamed N, Zeng, Jun
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:MOS-gated devices, related methods, and systems for vertical power and RF devices including an insulated trench and a gate electrode. A body region is positioned so that a voltage bias on the gate electrode will cause an inversion layer in the body region. Permanent electrostatic charges are included in said insulation material. A conductive shield layer is positioned above the insulated trench, to reduce parasitic capacitances.