CONVERTING A STALE CACHE MEMORY UNIQUE REQUEST TO A READ UNIQUE SNOOP RESPONSE IN A MULTIPLE (MULTI-) CENTRAL PROCESSING UNIT (CPU) PROCESSOR TO REDUCE LATENCY ASSOCIATED WITH REISSUING THE STALE UNIQUE REQUEST

Converting a stale cache memory unique request to a read unique snoop response in a multiple (multi-) central processing unit (CPU) processor is disclosed. The multi-CPU processor includes a plurality of CPUs that each have access to either private or shared cache memories in a cache memory system. Multiple CPUs issuing unique requests to write data to a same coherence granule in a cache memory causes one unique request for a requested CPU to be serviced or "win" to allow that CPU to obtain the coherence granule in a unique state, while the other unsuccessful unique requests become stale. To avoid retried unique requests being reordered behind other pending, younger requests which would lead to lack of forward progress due to starvation or livelock, the snooped stale unique requests are converted to read unique snoop responses so that their request order can be maintained in the cache memory system.