REFERENCE VOLTAGE STABILIZING CIRCUIT AND INTEGRATED CIRCUIT PROVIDED WITH SAME

A transistor (M1) whose gate is capacitance-coupled to a wiring (L1) is connected between the wirings (L1, L2) connected to output nodes (OT1, OT2) outputting a reference voltage (VREF_OUT). A replica circuit (20) having a resistor (22) and a transistor (M2) connected in series is provided between t...

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Bibliographische Detailangaben
Hauptverfasser: NOMASAKI, Daisuke, MORIE, Takashi
Format: Patent
Sprache:eng
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Zusammenfassung:A transistor (M1) whose gate is capacitance-coupled to a wiring (L1) is connected between the wirings (L1, L2) connected to output nodes (OT1, OT2) outputting a reference voltage (VREF_OUT). A replica circuit (20) having a resistor (22) and a transistor (M2) connected in series is provided between the wirings (L1, L2). Gates of the transistors (M1, M2) are connected to each other. A differential amplifier (23) receives a voltage (V_RP) of a node (N1) between the resistor (22) and the transistor (M1) and a standard voltage (V_ID), and provides an output to the gate of the transistor (M2).