PACKAGED SEMICONDUCTOR DEVICE AND METHOD FOR FORMING
A packaged semiconductor device includes a die attached to a die flag of a lead frame wherein the die includes a first, second, third, and fourth minor side, wherein the first and second minor sides are opposite each other and the third and fourth minor sides are opposite each other. The device incl...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A packaged semiconductor device includes a die attached to a die flag of a lead frame wherein the die includes a first, second, third, and fourth minor side, wherein the first and second minor sides are opposite each other and the third and fourth minor sides are opposite each other. The device includes an outer-most lead of the lead frame extending outwardly from the first minor side of the die and closest to the third minor side, wherein the outer-most lead includes a thinned region located between the die and a full thickness portion of the outer-most lead. The device includes an electrical connection between the die and the outer-most lead, and an encapsulant surrounding the die, the electrical connection, and surrounding at least a portion of an outer edge of the thinned portion of the outer-most lead such that the full thickness portion of the outer-most lead extends beyond the encapsulant. |
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