Gate Driver for Depletion-Mode Transistors

The present disclosure presents a circuit, method, and system for dynamically determining optimal deadtime values in a DC-DC converter power stage while operating the circuit under controlled conditions during a test/trim routine. The determined optimal deadtime values are stored in non-volatile mem...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Duduman, Bogdan M, Fogg, John K
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The present disclosure presents a circuit, method, and system for dynamically determining optimal deadtime values in a DC-DC converter power stage while operating the circuit under controlled conditions during a test/trim routine. The determined optimal deadtime values are stored in non-volatile memory. The optimal deadtime values are used as fixed settings during normal PWM operation. On start-up, the optimal, fixed deadtime values are loaded into the deadtime circuits of the driver and used during normal PWM operation of the DC-DC converter power stage circuit.