METHOD FOR DETECTING THE TOPOLOGY OF ELECTRICAL WIRING

A method for detecting the topology of electrical wiring between at least two field-programmable gate arrays (FPGAs) includes implementing a first receive register on a second interface pin; implementing a first send register on a first driver; activating the first driver via a first activation sign...

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Bibliographische Detailangaben
Hauptverfasser:	Kalte, Heiko, Lubeley, Dominik, Schlenger, Marc
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PULSE TECHNIQUE TESTING
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Beschreibung
Zusammenfassung:	A method for detecting the topology of electrical wiring between at least two field-programmable gate arrays (FPGAs) includes implementing a first receive register on a second interface pin; implementing a first send register on a first driver; activating the first driver via a first activation signal; emitting, by the first driver, a first signal, wherein the first signal is defined by the first send register; reading out, by a first receive register, whether the first signal is received at the second interface pin; and allocating the second interface pin to the first interface pin if the first signal from the first driver is received at the second interface pin.