UNIFIED CACHE FOR DIVERSE MEMORY TRAFFIC

A unified cache subsystem includes a data memory configured as both a shared memory and a local cache memory. The unified cache subsystem processes different types of memory transactions using different data pathways. To process memory transactions that target shared memory, the unified cache subsys...

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Bibliographische Detailangaben
Hauptverfasser: QIU, Xiaogang, EDMONDSON, John, CHOQUETTE, Jack, KRASHINSKY, Ronny, GEBHART, Mark, SIU, Michael, GADRE, Shirish, RAO, Poornachandra, PARANJAPE, Omkar, HEINRICH, Steven, JANDHYALA, Ramesh
Format: Patent
Sprache:eng
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Zusammenfassung:A unified cache subsystem includes a data memory configured as both a shared memory and a local cache memory. The unified cache subsystem processes different types of memory transactions using different data pathways. To process memory transactions that target shared memory, the unified cache subsystem includes a direct pathway to the data memory. To process memory transactions that do not target shared memory, the unified cache subsystem includes a tag processing pipeline configured to identify cache hits and cache misses. When the tag processing pipeline identifies a cache hit for a given memory transaction, the transaction is rerouted to the direct pathway to data memory. When the tag processing pipeline identifies a cache miss for a given memory transaction, the transaction is pushed into a first-in first-out (FIFO) until miss data is returned from external memory. The tag processing pipeline is also configured to process texture-oriented memory transactions.