MEMORY CELLS AND MEMORY ARRAY STRUCTURES, AND FABRICATION METHODS THEREOF

A memory cell includes a substrate including a first diode region, a second diode region, a third diode region, and a fourth diode region, a first well region formed in the first diode region and the second diode region, a second well region formed in the third diode region and the fourth diode region, a doped conductive region formed on the first well region and the second well region, and a deep trench isolation structure formed in the substrate to electrically isolate different portions of each of the first well region, the second well region, and the doped conductive region formed over different diode regions. The second well region and the first well region have different doping types. The memory cell includes a resistance random access memory device formed over the substrate and electrically connected to the doped conductive region in the second diode region and the third diode region.