STRAY INDUCTANCE REDUCTION IN PACKAGED SEMICONDUCTOR DEVICES AND MODULES

STRAY INDUCTANCE REDUCTION IN PACKAGED SEMICONDUCTOR DEVICES AND MODULES

In a general aspect, an apparatus can include a first substrate operatively coupled with a second substrate. The apparatus can also include a power supply terminal assembly including a first power supply terminal aligned along a first plane, the first power supply terminal being electrically coupled...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: JONG, Mankyo, LEE, ByoungOk, IM, Seungwon, JEON, Oseob, SON, Joonseo
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:In a general aspect, an apparatus can include a first substrate operatively coupled with a second substrate. The apparatus can also include a power supply terminal assembly including a first power supply terminal aligned along a first plane, the first power supply terminal being electrically coupled with the first substrate. The power supply terminal assembly can also include a second power supply terminal aligned along a second plane, the second power supply terminal being electrically coupled with the second substrate. The power supply terminal assembly can further include a power supply terminal frame having an isolation portion disposed between the first power supply terminal and the second power supply terminal and a retention portion disposed around a portion of the first power supply terminal and disposed around a portion of the second power supply terminal.