SEMICONDUCTOR DEVICE, SECURITY PROCESS EXECUTION DEVICE, AND SECURITY PROCESS EXECUTION METHOD

SEMICONDUCTOR DEVICE, SECURITY PROCESS EXECUTION DEVICE, AND SECURITY PROCESS EXECUTION METHOD

It is possible to prevent a central processing unit and a security processing unit from accessing of a non-volatile memory at the same time. A data flash 13 includes a secure area 31 and a user area 32. In the secure area 31, a plurality of pieces of security information used in a security process i...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: ASARI, Shinsuke, ITO, Kenichi, MORI, Yuki, SHIOTA, Shigemasa
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:It is possible to prevent a central processing unit and a security processing unit from accessing of a non-volatile memory at the same time. A data flash 13 includes a secure area 31 and a user area 32. In the secure area 31, a plurality of pieces of security information used in a security process is stored. A security IP 12 reads out a portion of the plurality of pieces of security information from the secure area 31 and stores it in the secure RAM 22. When the security information to be used in the security process is stored in the secure RAM, the security IP 12 reads out the security information from the secure RAM 22 and uses it.