SYSTEM, APPARATUS AND METHOD FOR LOW OVERHEAD CONTROL TRANSFER TO ALTERNATE ADDRESS SPACE IN A PROCESSOR

SYSTEM, APPARATUS AND METHOD FOR LOW OVERHEAD CONTROL TRANSFER TO ALTERNATE ADDRESS SPACE IN A PROCESSOR

In one embodiment, a processor includes: an accelerator associated with a first address space; a core associated with a second address space and including an alternate address space configuration register to store configuration information to enable the core to execute instructions from the first ad...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Dakshinamoorthy, Srikanth, Howard, Jason M, Nagasundaram, Banu Meenakshi, Boswell, Brent R, Fryman, Joshua B, Abbott, Michael D
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:In one embodiment, a processor includes: an accelerator associated with a first address space; a core associated with a second address space and including an alternate address space configuration register to store configuration information to enable the core to execute instructions from the first address space; and a control logic to configure the core based in part on information in the alternate address space configuration register. Other embodiments are described and claimed.