METHODS OF FORMING INTEGRATED CIRCUIT STRUCTURE WITH SILICIDE REIGON

Embodiments of the present disclosure relate to methods of forming an integrated circuit (IC) structure with a silicide region. Methods according to the present disclosure can include providing a structure including: a semiconductor region positioned on an electrostatic chuck, and a precursor metal...

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Bibliographische Detailangaben
Hauptverfasser: Varadharajan, Vijayaragavan, Fitz, Clemens Christof Stefan
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Embodiments of the present disclosure relate to methods of forming an integrated circuit (IC) structure with a silicide region. Methods according to the present disclosure can include providing a structure including: a semiconductor region positioned on an electrostatic chuck, and a precursor metal positioned on and in contact with the semiconductor region; heating the semiconductor region of the structure to an annealing temperature by increasing a temperature of the electrostatic chuck; irradiating the structure with a radiant heat source, such that at least some of the precursor metal migrates into a portion of the semiconductor region to form a silicide region during the irradiating; and removing a remainder of the precursor metal from the structure to expose the silicide region, after the irradiating.